Reduction of Time to Market through Transport Layer IP Cores

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Machine vision camera suppliers can benefit from creating reliable standard transmission

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Reduction of Time to Market through Transport Layer IP Cores
Reduction of Time to Market through Transport Layer IP Cores
Ozray has implemented IP cores in its Pollux and Pamina area and line scan cameras
Ozray has implemented IP cores in its Pollux and Pamina area and line scan cameras
Crevis purchases IP cores for GigE, CXP and USB interfaces from S2I
Crevis purchases IP cores for GigE, CXP and USB interfaces from S2I
Sick’s Ranger 3 3D streaming camera offers a greater number of 3D profiles per second in combination with a large height range and high image quality
Sick’s Ranger 3 3D streaming camera offers a greater number of 3D profiles per second in combination with a large height range and high image quality

When it comes to machine vision cameras and systems, the core competency engineers usually use relies on configuring the core camera features to provide the best possible image while meeting size, weight, power budget and other requirements. In addition, successfully streaming the image from the camera to the host can be time consuming. Since leading edge vision transport layer standards (such as GigE, USB3 and CoaXPress) are complex and evolving, months of work by experienced protocol engineers are required to design the interface.

Several manufacturers of machine vision cameras such as Ozray, Crevis and Sick try to answer this challenge by investing in transport layer interfaces in the form of intellectual property (IP) which is offered ready to incorporate into field programmable gate arrays (FPGAs) along with other camera features. June Hwang, Chief Executive Officer of Crevis stated: “The biggest advantage of using IP cores is that we can create a reliable standard transmission interface in a fraction of the time previously required”.


“Use of IP Cores enables us to develop more cameras at the same time while reducing time to market,” Keith Ahn, Executive Director and Chief Technology Officer at Ozray


The emergence of machine vision transport layer IP cores reduces the time required to develop camera-host interfaces. For instance, Sensor to Image (S2I), a unit of Euresys, provides IP cores that meet the latest CXP, GigE Vision and USB3 Vision interface standards. These IP cores secure the interoperability of the camera and host while ensuring compliance with the latest version of the interface layer. S2I’s Vision Standard IP Cores solutions are delivered as a working reference design along with FPGA IP cores that have been fully tested against a wide range of popular frame grabbers and image acquisition libraries. They are compatible with Xilinx 7, Intel/Altera Cyclone V and more recent devices.

The top-level design, consisting of the interface between external hardware such as the image sensor and transport layer PHY, is delivered as VHDL source code that can be adapted to custom hardware beyond the leading FPGA platforms supported by IP cores. The Video Acquisition Module of the reference design simulates a camera with a test pattern generator. This module is delivered as VHDL source code which is replaced by a sensor interface and pixel processing logic in the camera design. An FPGA integrated CPU (either MicroBlaze, NIOS or ARM) is used for several non-time-critical control and configuration tasks on the Vision Standard IP Cores. This software is written in C and can be extended by the customer.


Compact, the IP cores leave plenty of room for additional vision functionality


“By reusing IP cores, machine vision companies can focus on how to make the best image while maintaining full freedom to use any hardware needed to meet size, weight and power budget issues,” said Jean Caron, Vice President Sales and Support, EMEA for Euresys. “We work closely with the CoaXPress, USB3 Vision and GigE Vision committees to ensure that our IP cores comply with the latest revisions of the standards,” said Matthias Schaffland, IP Product Specialist at S2I. S2I has recently introduced an IMX Pregius IP core offering an interface to Sony Pregius Sub-LVDS image sensors. Moreover, the company will soon introduce an interface to MIPI sensors primarily used in embedded vision systems and mobile devices. S2I provides a volume license well suited for companies with a large product line as well as a single-piece license which is a better option for companies with smaller lines. “IP Cores enable machine vision companies to build FPGA-based products using the GigE Vision, USB3 Vision, and CoaXPress standards, delivering the highest possible performance in a small footprint while minimizing development time,” Schaffland concluded.

Posted on January 7, 2020 - (526 views)
Euresys SA
Avenue Du Pre Aily 14 Parc Scientific/Sart Tilman
4031 Angleur - Belgium
+32-4-3677288
+32-4-3677466
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Description

Euresys is a leading and innovative high-tech company, designer and provider of image and video acquisition components, frame grabbers, FPGA IP cores and image processing software. Euresys is active in the computer vision, machine vision, factory automation, medical imaging and video surveillance markets. The company’s image acquisition expertise covers analog and digital video acquisition, FPGA programming, high-frequency electronics, video compression and streaming, and also camera control. Recently strengthened by the acquisition of the company Sensor to Image, its 30 years of imaging know-how includes GigE Vision, USB3 Vision, CoaXPress, Camera Link and GenICam.

In terms of image analysis, Euresys’ skills apply to blob detection, sub-pixel measurement, pattern matching, color analysis, optical character recognition, barcode reading and verification, 3D inspection and classification using deep learning.

With R&D in Belgium and Germany, Euresys has sales and support offices in Europe, the US (California), Singapore, China (Shanghai) and Japan (Tokyo) as well as an extensive network of distributors throughout the world. Euresys is renowned for providing high quality solutions and premium support to OEMs and system integrators worldwide.

Euresys products include:

- A wide range of high-performance frame grabbers for CoaXPress,Camera Link, and non-standard analog image acquisition. These boards support image acquisition from the fastest and highest resolution cameras available in the market

- Image processing and analysis software tools for defect detection, sub-pixel measurement, alignment, color analysis, optical character recognition, barcode reading and verification, 3D inspection and classification using deep learning

- GigE Vision, CoaXPress and USB3 Vision IP cores for FPGAs. They minimize development time while offering high performance in a small footprint

- Encoders for video streaming over IP,with HEVC (H.265) compression and encryption, for video-surveillance and security applications

- Specific ruggedized PC/104 COTS boards designed for the most demanding industrial, security, transport or military embedded applications

- SD (standard definition) and HD (high definition) video capture cards used in healthcare, traffic control and high-end - PC-based video surveillance applications

- Customized hardware components and solutions for OEM vision applications

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